[libre-riscv-dev] Instruction sorta-prefixes for easier high-register access

[Luke Kenneth Casson Leighton]

On Sun, Jan 27, 2019 at 11:36 PM Jacob Lifshay <programmerjake at gmail.com> wrote:

> Note for Luke: this has old stuff, so don't skip over

 ok.

> A table of the scalar/vector encodings:
> 1 register, integer:
> 1-bit field
> v: 0
> s: 1

 if we have implicit scalar-vector from the register numbering-prefix,
a separate field isn;t needed.

 reduce operations i decided in the original SV to not include, as it
creates dependencies that i felt would be better expressed as straight
loops.  instead, the for-loop for the "hardware-macro-unrolling" would
simply terminate after the first element operation successfully
completed, taking predication into account in that.

 so VEXTRACT and VINSERT just become accidentally-implemented
side-effects of the loop termination.

l.