[libre-riscv-dev] SV auto-width

[Luke Kenneth Casson Leighton]

On Wed, Jan 9, 2019 at 6:03 AM Jacob Lifshay <programmerjake at gmail.com> wrote:

> We will need fast f32 <-> i16 at least since that is used for 16-bit
> z-buffers.

 one potential workaround is to actually have a z-buffer opcode.

 f32-i16 would on first thought need to be farmed to the 8/16-bit
Function Units, as those are where i was planning to have the
xBitManip that will be able to cope with the byte-shuffling involved.

 however... those are supposed to only deal with "corner-cases".  it
looks like we'd need some xBitManip on the 32-bit FU side as well.

 the issue is that the 16 bit results would need to go to the same
32-bit destination register.  odd elements would go to the LSW, even
elements to the HSW.

 it's doable: it just means 6 GOPs / sec (i think).

> Since we don't have indexed load/store and need to manually
> construct pointer vectors we will need fast i32 -> i64. We will also need
> fast i32 <-> f32.

 i32->f32 is easy, no bitwidth changes there.  that can be done at 12
GOPs/sec.  i32->i64 would be dual-issue due to the 64-bit dest width,
that means 6 GOPs / sec.

so, it's doable, i think.

l..