[libre-riscv-dev] IEEE754 FPU

[Aleksandar Kostovic]

>
> btw aleksander, no pressure or anything: congratulations, you're on the
> critical path (yay).
> it goes like this:
> * normalise-1 and 2 do shifting of bits from the result to
> guard/sticky/round, in a silly fashion.
> * to do a general purpose single cycle version of normalise stages, having
> to move bits back and forth from sticky/guard/round is difficult.
> * most sensible way is to do normalisation in the product/result THEN do
> guard/round/sticky.
> However all of that if done before multiply is up to date is not a good
> idea, it would be out of sync.
> So, I will keep occupied with doing things like add unit tests, and find
> other tasks ok?


 Can you go over the multiply please? I literaly have no idea what should i
do. If you fix it i can compare to a copy'd file so i know what i should
have done. Would you be up for that?

On Mon, Feb 18, 2019 at 2:32 PM Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> btw aleksander, no pressure or anything: congratulations, you're on the
> critical path (yay).
>
> it goes like this:
>
> * normalise-1 and 2 do shifting of bits from the result to
> guard/sticky/round, in a silly fashion.
>
> * to do a general purpose single cycle version of normalise stages, having
> to move bits back and forth from sticky/guard/round is difficult.
>
> * most sensible way is to do normalisation in the product/result THEN do
> guard/round/sticky.
>
> However all of that if done before multiply is up to date is not a good
> idea, it would be out of sync.
>
> So, I will keep occupied with doing things like add unit tests, and find
> other tasks ok?
>
> L.
>
>
>
> --
> ---
> crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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