[libre-riscv-dev] IEEE754 FPU

[Luke Kenneth Casson Leighton]

btw just for kicks i added jon dawson's unit tests to test_add.py,
using sfpy.Float32 to do the actual calculations.  interestingly i
found two bugs so far plus one that is clearly from the *original*
library (A + -A != 0, instead is a runaway trainwreck in normalisation
stage 1).

one of the bugs, -1e37 + -1e37 should be -INF, where the adder.v was
returning +INF not -INF.

with those corrected, so far it's run over 250,000 tests, all passed.

l.