[libre-riscv-dev] IEEE754 FPU

[Luke Kenneth Casson Leighton]

On Tuesday, February 12, 2019, Aleksandar Kostovic <
alexandar.kostovic at gmail.com> wrote:

> Okay so this is how I get it so far:
>
> Let's start with the number itself.
>
> |   sign  |    exponent  | fraction |
> -----------------------------------------
> |   1bit   |      8 bits      |  23bits  |
> -----------------------------------------
> |    31    | 30          23 | 22      0 |
>
> That's for single precision - 32 bit.


Yep.


>
> Now let's talk about how sign number is determined. To my understanding
> sign is 0 if the number is positive(example 0.12345) and 1 in the number is
> negative(example -0.12345). When we need to add two floating point numbers,
> two sign's are just added using the XOR gate.


If you look at softfloat lib, the XOR of the signs is used to detect if the
add fn is called or the sub fn.

sA XOR sB == 0, use add. 1, use sub.

If you add 2 -ve numbers, it is as if you added 2 +ve numbers then set the
FP sign bit to -ve.

The corner cases are for when the numbers are +INF or -INF, those are dealt
with specially.

Haven't looked at subtract yet.
L.



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