[libre-riscv-dev] Introduction

Jacob Lifshay programmerjake at gmail.com
Tue Feb 5 00:04:59 GMT 2019


On Mon, Feb 4, 2019, 15:59 Luke Kenneth Casson Leighton <lkcl at lkcl.net
wrote:

> On Mon, Feb 4, 2019 at 11:45 PM Jacob Lifshay <programmerjake at gmail.com>
> wrote:
> >
> > lets use python then.
>
> checking....
>
> # pip3 install sfpy
> $ python3
> >>> import sfpy
> >>> sfpy.Float16.from_bits(0x10)
> Float16(9.5367431640625e-07)
> >>> sfpy.Float16.from_bits(0x1000)
> Float16(0.00048828125)
> >>> sfpy.Float16.from_bits(0x0000)
> Float16(0.0)
>
> main concern alleviated, there's a conversion from hex (bits)
>
> has all of the functions from berkeley softfloat3 all there.
>
no, it doesn't (assuming you posted the complete list).
it's missing tininess before/after rounding, which RISC-V defines to be
after rounding.
Also, not that we will need it, it's missing extFloat80 and Float128.

>
>
> >>> dir(sfpy.softfloat)
> ['FLAG_INEXACT', 'FLAG_INFINITE', 'FLAG_INVALID', 'FLAG_OVERFLOW',
> 'FLAG_UNDERFLOW', 'Float16', 'Float32', 'Float64', 'ROUND_DOWN',
> 'ROUND_NEAREST_AWAY', 'ROUND_NEAREST_EVEN', 'ROUND_TO_ZERO',
> 'ROUND_UP', '__builtins__', '__doc__', '__file__', '__loader__',
> '__name__', '__package__', '__spec__', '__test__', 'f16_abs',
> 'f16_add', 'f16_div', 'f16_eq', 'f16_fma', 'f16_le', 'f16_lt',
> 'f16_mul', 'f16_neg', 'f16_rem', 'f16_round', 'f16_round_to',
> 'f16_sqrt', 'f16_sub', 'f16_to_f32', 'f16_to_f64', 'f32_abs',
> 'f32_add', 'f32_div', 'f32_eq', 'f32_fma', 'f32_le', 'f32_lt',
> 'f32_mul', 'f32_neg', 'f32_rem', 'f32_round', 'f32_round_to',
> 'f32_sqrt', 'f32_sub', 'f32_to_f16', 'f32_to_f64', 'f64_abs',
> 'f64_add', 'f64_div', 'f64_eq', 'f64_fma', 'f64_le', 'f64_lt',
> 'f64_mul', 'f64_neg', 'f64_rem', 'f64_round', 'f64_round_to',
> 'f64_sqrt', 'f64_sub', 'f64_to_f16', 'f64_to_f32',
> 'flag_clear_inexact', 'flag_clear_infinite', 'flag_clear_invalid',
> 'flag_clear_overflow', 'flag_clear_underflow', 'flag_get',
> 'flag_get_inexact', 'flag_get_infinite', 'flag_get_invalid',
> 'flag_get_overflow', 'flag_get_underflow', 'flag_raise_inexact',
> 'flag_raise_infinite', 'flag_raise_invalid', 'flag_raise_overflow',
> 'flag_raise_underflow', 'flag_reset', 'flag_set', 'round_get_mode',
> 'round_is_down', 'round_is_nearest_away', 'round_is_nearest_even',
> 'round_is_to_zero', 'round_is_up', 'round_set_down', 'round_set_mode',
> 'round_set_nearest_away', 'round_set_nearest_even',
> 'round_set_to_zero', 'round_set_up']
>
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