[libre-riscv-dev] [Bug 123] IEEE754 FPU FMAC needed
bugzilla-daemon at libre-riscv.org
bugzilla-daemon at libre-riscv.org
Sat Aug 10 06:49:18 BST 2019
http://bugs.libre-riscv.org/show_bug.cgi?id=123
--- Comment #7 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
http://www.jhauser.us/arithmetic/HardFloat-1/doc/HardFloat-Verilog.html
http://www.jhauser.us/arithmetic/HardFloat.html
the source is a .zip archive, where mulAddRecFn.v can be found, and it's proven
and correct.
i can do a conversion to nmigen, keeping the logic intact, it's only 450 lines
or so, and we'll not need to do "research".
also i just spotted that there's a really clean "rounding" function which will
be extremely useful.
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