[libre-riscv-dev] barrel processor as I/O and DMA controller

Jacob Lifshay programmerjake at gmail.com
Wed Apr 10 19:11:35 BST 2019


bsim4 will probably be useful. I'm pretty sure it's open source though it
has an unusual license. http://bsim.berkeley.edu/models/bsim4/

On Wed, Apr 10, 2019, 11:06 Jacob Lifshay <programmerjake at gmail.com> wrote:

> this might be useful:
> http://www.vlsiacademy.org/open-source-cad-tools.html
>
> On Wed, Apr 10, 2019, 10:50 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> wrote:
>
>> ---
>> crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
>>
>> On Wed, Apr 10, 2019 at 6:41 PM Jacob Lifshay <programmerjake at gmail.com>
>> wrote:
>> >
>> > If we need, I do have some designs in mind for a PLL that doesn't need
>> any
>> > special parts other than capacitors (no op-amps, specially matched
>> > transistors, or resistors), but they wouldn't have particularly good
>> jitter
>> > or anything. I'm not sure how we would put analog circuits on the SoC in
>> > terms of HDLs. Maybe Verilog-AMS?
>>
>>  honestly not even begun to investigate.
>>  https://en.wikipedia.org/wiki/Verilog-AMS#Open_Source_Implementations
>>
>>  openvams, v2000, and ngspice "adms"
>> http://ngspice.sourceforge.net/adms.html
>>
>> l.
>>
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>>
>


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