[libre-riscv-dev] IEEE754 FPU turning into ALU with Reservation Stations

[Luke Kenneth Casson Leighton]

On Thu, Apr 4, 2019 at 6:40 AM Aleksandar Kostovic
<alexandar.kostovic at gmail.com> wrote:
>
> okay, so that was funny. turns out I didn't exactly understand what to do,
> despite looking and the pipeline_example.py file. Will wait to see how you
> do get_a stage so I can do put_z similarly.

 that's because i'm getting it all hopelessly wrong and making a mess, myself :)