[libre-riscv-dev] simple barrel processor pipeline design diagram

[Jacob Lifshay]

I created a pipeline design diagram for the simple barrel processor I'm
creating to familiarize myself with nmigen and to possibly use as a
low-power minion core. I'm planning on it supporting RV64IMAC. It has a
5-stage pipeline, so supports 5 harts.

https://salsa.debian.org/Kazan-team/simple-barrel-processor/blob/master/doc/PipelineDesign.svg

Jacob