[libre-riscv-dev] New Person

[lkcl]

On Sun, Oct 14, 2018 at 6:18 AM Daniel Benusovich
<flyingmonkeys1996 at gmail.com> wrote:
>
> Success on running spike! A whole lot of debug appears on the screen with
> the HelloWorld running 'spike pk HelloWorld'. Mostly output like this:

 yyeaaahhh :)

> > set CSR 300 0
> > set CSR 340 0
> > set CSR 305 80000004
> > pre twin reg c_swsp src 0 dest 0 pred ffffffffffffffff ffffffffffffffff
> > pre c_swsp c002 vloop 0 0 0vlen 1 stop 1 pred 1 rdv 4 v 27 rvc2 216 sp 0
> > pre twin reg c_swsp src 0 dest 0 pred ffffffffffffffff ffffffffffffffff
> > pre c_swsp c002 vloop 0 0 0vlen 1 stop 1 pred 1 rdv 4 v 27 rvc2 216 sp 0
> > pre twin reg c_swsp src 0 dest 0 pred ffffffffffffffff ffffffffffffffff
> > pre c_swsp c002 vloop 0 0 0vlen 1 stop 1 pred 1 rdv 16 v 27 rvc2 216 sp 0
> >
>   etc.
>
> The problem was the readme for riscv-isa-sim instructs you create a build
> folder and run the config/make commands in there. However the generated
> make file cannot find the python scripts (which are one directory up)
> required to run. The fix is to run the config script/make commands inside
> riscv-isa-sim (there are a lot of .o files in here now).

 yep that's what i do.

>  It would probably
> be nice to fix this, I am willing to bet nobody want that many files when
> entering the directory! The SV variant of riscv-tests also pass. I will
> update the emulator instructions to match my findings.

 hooraaay, awesome.

> Let me know what to work on next now that this is the correct result
> (hopefully). I could work to fix the issue with the build folder or
> whatever you need.

 yes please, that would be great.  if you like, send me an id_rsa.pub
file, or you could use "git format-patch HEAD~" after doing each
commit.  or, if you do several, git format-patch HEAD~4 or 5 or
however many commits you did.

l.