[libre-riscv-dev] spike-sv non-default element widths

Luke Kenneth Casson Leighton lkcl at lkcl.net
Tue Oct 9 19:52:47 BST 2018


ok adding in native support in spike for non-default element widths is
a massive task, where i really do not want to do a redesign of spike.

the issue however is that, dynamically, at runtime, all the
combinations of element bitwidths in all permutations for all
registers used, need specific code to be generated and then called.

* if rd is to be used, that's 1 dimension of 4 entries: default,
default/2, default*2 and 8-bit
* if rs1 is to be used, that's a 2nd dimension of 4 entries
* if rs2 ...

so that would be SIXTY FOUR possible code-paths (!!!)

and in each case, i think it would be sensible to bring in a
*template-if-ied* version of the instruction class.  the templated
version would have overloaded operators +, - > = etc. etc. including
for floating-point.  unnnnfortunately, floating-point has been done in
a declarative (non-class-based) fashion, with functions "f64_eq" and
so on,   there, *maybe* some #defines can work around that.

the idea is, basically, to have a table of template-ified versions of
the instruction class that, when declared, pass the element widths in
and down to the register file.

so, when the index (element offset) is passed in to a request for an
element (READ/WRITE), an operator "overload" takes care of where the
data actually goes, performing the required typecasting on the
register file entry.

it'll be a bit... complex.  thoughts on alternative approaches appreciated.

l.



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