[libre-riscv-dev] SoC and HWRNG

[Jacob Lifshay]

I think that it would be a good idea to include a hardware random number
generator in the SoC as embedded devices are notorious for being randomness
starved on boot and having weak cryptographic keys as a result. I would
suggest using something like https://github.com/waywardgeek/infnoise
despite needing analog circuitry as it's much harder to cause the output to
stop being random if the capacitors used for storing the state are big
enough (1 pF should be enough assuming the thermal noise is bigger than 1
uV or so, which it is except at very low temperatures).
I have built one of these on a breadboard and it seems to work just fine,
though I haven't performed any statistical analysis on my version.
Note that we won't need a particularly high data rate as we can use a SPRNG
to produce more random numbers once we have mixed in several hundred random
bits.
10kbits/s should be easily achievable.

Jacob
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/attachments/20181007/4238a32f/attachment.html>