[libre-riscv-dev] libre-riscv-dev Digest, Vol 3, Issue 5

Daniel Benusovich flyingmonkeys1996 at gmail.com
Wed Nov 14 07:35:44 GMT 2018


Alrighty some progress has been made with the unit test sv_addw_elwidth.S.

I understand most of what is happening though somethings still elude me.

I have created a test case (not committed or patched yet) where x15 is a
scalar while the second parameter is not (x12 - x14):

        SV_ELWIDTH_TEST(  3, 0, 0, 0, 0, 1, 1,
                0xffffffff8b6bab8b,  0xffffffff89694929,
0x0000000042322212 )

That actually passes! Truly a miracle from the gods. However, during the
grueling trials that came from figuring this out a few problems came to
light.

1. Whenever the test fails it goes into an endless loop after the BNE in
the TEST_SV_IMM macro. Not to sure where it goes but it starts to call some
BEQ that loops forever that i could not find (Got this by looking at the
generated log before it was deleted or crashed my computer). Not fun at
all. From what I could tell it is supposed to exit out and post an error
like the other tests but this one for one reason or another does not. Any
ideas?

2. An additional attempt to create a test case resulted in the following:

        SV_ELWIDTH_TEST(  3, 0, 0, 4, 0, 1, 1,
                0xffffffff8b6bab8b,  0xffffffff89694929,
0x0000000042322212 )

which works just fine since this is a 64 bit simulated machine and matches
the default of 0. However, when I changed the macro to:

        SV_ELWIDTH_TEST(  3, 4, 4, 4, 0, 1, 1,
                0x000000ab8b6bab8b,  0x000000a989694929,
0x0000005242322212 )

fails... but this macro:


        SV_ELWIDTH_TEST(  3, 4, 4, 4, 0, 1, 1,
                0xffffff8b6bab8b,  0xffffff89694929,  0xffffff42322212 )
passes!

>From what I understand the widths of the vectors determine the length of
data to be tossed into the source. I'm pretty sure a misunderstanding has
occurred. I see in the other test cases how modifying the length of the
source elements determines the precision of the data in the destination
register

This is mostly an update as to what is happening on my end. With some more
experimentation the answers I seek will no doubt be found but an
explanation always helps everything move along quicker. I will continue to
add test cases and submit a patch for this unit test until told to
otherwise. Let me know if that is alright.

Hope everything is going well,

Daniel.


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