[libre-riscv-dev] evaluation of bit-witdh scoreboards

[lkcl]

https://groups.google.com/forum/#!topic/comp.arch/2kYGFU4ppow

commentary on comp.arch: the size of the matrices needed are *massive*.

* each LD/ST will need its own FU, that's 8.
* each branch (per speculation) likewise
* if we want 4-issue we need an absolute minimum of 4 FUs

that's *per bit-width*.

regarding VSHUFFLE: it can be done by parallelising a MV.X and
FMV.X... except no such scalar operation exists: we will have to add
one.

i really don't like to add instructions, we do however have to add
them anyway. it would however be way, WAY simpler than the remap
system and would allow sequential instruction-issue

also, we need to evaluate whether to drastically cut down the number
of registers and use a 2k SRAM instead.

l.